Background Research

By Christian Brown and Mustafa Momin

Background Problem definition:

Our system collects and processes information from across the electromagnetic spectrum. FPGAs serve as “glue logic” between off the shelf components, and as replacements for ASICs in first generation products. Recently, however, FPGAs have become so dense and fast that they have evolved into the central processors of powerful reconfigurable computing systems [1]. A Xilinx XCV-2000E, for example, contains 38, 400 logic blocks, and can operate at speeds of up to 180MHz. The logic blocks can be configured so as to exploit data, pipeline, process, or I/O parallelism, or all of the above. In computer vision and image processing, FPGAs have already been used to accelerate real-time point tracking, stereo , color-based object detection [4], and video and image compression.

Altera FPGA:

Digital camera resolution: 4096 x 1714 pixels. Structured ASIC migration path to low costs: Altera structured ASICs start at US$15 at 100ku for 1 million ASIC gates. Altera's Video and Image Processing Solution: This includes optimized DSP Design Flows, Altera's Video and Image Processing Suite, and interface and third-party video compression IP, and video reference designs.

In image processing, FPGAs have shown very high performance in spite of their low operational frequency. This high performance comes from

(1) high parallelism in applications in image processing,

(2) high ratio of 8 bit operations, and

(3) a large number of internal memory banks on FPGAs which can be accessed in parallel. In the recent microprocessors, it becomes possible to execute SIMD instructions on 128 bit data in one clock cycle. Furthermore, these processors support multi-cores and large cache memory which can hold all image data for each core.

The performance of FPGAs with those processors using three applications in image processing, the three being two-dimensional filters, stereo-vision and k-means clustering, makes it clear how fast an FPGA processes an image, and how many hardware resources are required to achieve the performance.

The economics of FPGAs are fundamentally different from the economics of other parallel architectures. Because of the comparatively small size of the image processing market, most special-purpose image processors have been unable to keep pace with advances in general purpose processors. As a result, researchers who adopt them are often left with obsolete technology. FPGAs, on the other hand, enjoy a multi-billion dollar market as low-cost ASIC replacements. Consequently, increases in FPGA speeds and capacities have followed or exceeded Moore’s law for the last several years, and researchers can continue to expect them to keep pace with general-purpose processors.

This entire project is expected to be built in VHDL and so it will follow the IEEE Standard VHDL Language as specified in their reference manual.[5]

It is possible that a camera-link interface may have to be used and/or the entire interface designed by our team for this project. However, in our 2nd meeting with the project advisor this was made null. Since this is a rough draft, we’re linking a webpage to an explanation of the camera-link interface standard specifications. [6]

As far as a link to the hyperspectral imager through gigabit Ethernet which, Altera offers pre-made designs for implementation with their FPGAs. Gigabit Ethernet is a cost-effective technology when used to do the following: Connect multiple devices to a local CPU, Interconnect multiple boards across a backplane or across systems for data transfer, and Control signaling between line cards and the host CPU within an embedded system.