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Contact Us
Course Staff

Instructor

Dr. Brock J. LaMeres
533 Cobleigh Hall
Bozeman, MT 59717

Tel: (406) 994-5987
Fax: (406) 994-5958
lameres@ece.montana.edu

Teaching Assistant

Clint Gauer
601 Cobleigh Hall
Bozeman, MT 59717

clint.gauer@myportal

EE 367 - Logic Design
(Spring 2008)

Course Information

Course Description

This course introduces students to advanced logic circuit design techniques. This course is a continuation of EE261/262 and will introduce logic system design using a hardware description language (VHDL). Design constraints such as timing, design reuse, and implementation considerations will be presented. This course includes a weekly lab where students will get hands-on experience implementing digital systems on a Xilinx Virtex-4 FPGA.

Textbook

"Digital Design, Principles and Practice" 4th Edition. (Required)
by John F. Wakerly
Prentice Hall, 2006
(Same text used in EE261)

Time and Location

Lecture ROBH 208
MWF
11:00am - 11:50am
Lab-02 COB 601
Wednesday
2:10pm - 4:00pm
Lab-03 COB 601
Wednesday
4:10pm - 6:00pm

Office Hours

Monday 3:00pm - 4:00pm
Friday 2:00pm - 3:00pm
Also Available by Email Appointment

Grading

Homework 10 %
Lab 30 %
Exam #1 20 %
Exam #2 20 %
Project 20 %

Pre-Requisites

EE262, EE371




View Text-only Version Text-only Updated: 1/16/2008
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