Assembler Phasing Errors

A phase error is caused by a label in the symbol table having a address that is different after the second pass than what it was after the first pass. This is usually caused by not having an ORG statement properly defining the location of the code.

Look at the following examples:


Assembler release TER_2.0 version 2.09
(c) Motorola (free ware)
0001                         * Test program asmphase.asm
0002                         * Example 1:  
0003 0000 96 04              	ldaa	temp
0004 0002 3f                 	swi
p:\test.ASM, line no. 5: Phasing Error
0005 0003 01                 temp	fcb	1
Example 1: Here no ORG is given so the assembler assumes 0. It doesn't know where "temp" is when it assembles line 0003 so it must assume a two- byte address for the operand. At the end of the first pass, "temp" is assigned the address 0004 (as you can see in byte 0001 of the assembled code). At the end of the second pass, "temp" has the address 0003 because only one byte was used for the address of the data in the ldaa instruction. This is a phase error.
0006                            ***********************
0007                            * Example 2:
0008                            * Now ORG at page 0
0009 0000                       	ORG 0
0010                            loop1	
0011 0000 96 06                 	ldaa	temp1
0012 0002 26 fc                 	bne	loop1
0013 0004 3f                    	swi
p:\test.ASM, line no. 14: Phasing Error
0014 0005 01                    temp1	fcb	1
Example 2: ORGing at 0 doesn't help.
0015                            **********************
0016                            * Example 3:
0017                            * Now ORG at page 0
0018 0000                       	ORG 0
0019                            loop3	
0020 0000 96 0f                 	ldaa	temp3
0021 0002 26 fc                        	bne	loop3
0022 0004 3f                 	  swi
0023                            * And let assembler know where
0024                            * the data should  be
0025 000f                       	ORG	$0f
0026 000f 01                    temp3	fcb	1
Example 3: Here, the location of "temp3" is fixed by the ORG $0f. It doesn't change addresses at the end of pass 2. This, of course, is a BAD idea. You NEVER want to locate a variable data element other than at the start of RAM but it illustrates the point a phase error is caused by an address changing.
0027                            **********************
0028                            * Example 4:
0029                            * Now ORG at page 0
0030 0000                       	ORG 0
0031                            oop2	
0032 0000 b6 01 32              	ldaa	temp2
0033 0003 26 fb                 	bne	loop2
0034 0005 3f                     	swi
0035                            * Force temp2 to be on page 1
0036                            * (16-bit address)
0037 0006                        	rmb	300
0038 0132 01                    temp2	fcb	1
Example 4: This shows that the problems we have seen are associated with the data location being on page 0 (0000-00ff). Here "temp2" is forced onto page 1 by the extra bytes allocated by the RMB, and a 16-bit address is needed to specify its location for the ldaa instruction. Thus, the address of "temp2" doesn't change on the second pass.
0039                            **********************
0040                            * Example 5:
0041                            * Now ORG where it should be
0042 c000                       	org	$c000
0043                            loop4	
0044 c000 b6 c0 06              	ldaa	temp4
0045 c003 26 fb                 	bne	loop4
0046 c005 3f                 	        swi
0047 c006 01                    temp4	fcb	1
Example 5: When using the EVB, code should be ORGed at $c000. Now all data addresses are two bytes and everything is fine.
0048                            ***************************
0049                            * Example 6:
0050                            * More phase errors testing
0051                            *
0052 c000                         	org	prog
p:\test.ASM, line no. 53: Phasing Error
0053                            label	
0054 c000 86 01                 	ldaa	#one
0055 c002 96 07                 	ldaa	two
p:\test.ASM, line no. 56: Branch out of Range
0056 c004 20 fe              	        bra	label
0057 c000                       prog	equ	$c000
0058 0001                       one	equ	1
p:\test.ASM, line no. 59: Phasing Error
0059 c006                       two	rmb	1
Example 6 shows another error that can happen. Now the symbol "prog" and an equate are used to define the program location. However, the symbol is referenced before the equate and so the assembler must assume a starting program counter of 0. This causes it to assign 0007 to the label "two" on the first pass and $c006 on the second pass. This also gives the phony Branch out of Range error. There is a phase error on "label" because on the first pass it will be assigned address 0000 and on the second $c000.
0060                            ***************************
0061                            * Example 7:
0062                            * Now when the assembler knows where
0063                            * to org it, all is ok
0064 c000                    	        org	prog
0065                            label1	
0066 c000 86 01                 	ldaa	#one
0067 c002 96 07              	        ldaa	two
0068 c004 20 fa              	        bra	label1
In example 7 there are no phase errors because the equate for "prog" occurs before its reference. Thus all addresses are 16-bit.
0069                            ***************************
0070                            * Example 8:
0071 0000                       	org	0
0072 0000 01                    data1	fcb	1
0073 0001 96 00                 	ldaa	data1
0074 0003 3f                    	swi
Examples 7 and 8 give the bottom line: If you are locating code and variables in page zero, the label must be found before its reference. Also, if you are using an equate and a label for an ORG, the equate must be defined before the reference (example 7).